Search Results - computers

                                            

[%SearchResultsTechnologyDescription%]

Neuromorphic computing, systems designed to mimic the biological nervous system, require far less power than current computer processors. The increased efficiency makes feasible artificial intelligence applications for smaller, hand-held devices (e.g. smartphones, tablets).  To this end, UMass inventors have designed hardware components that mimic neuronal synapses (Figure A). Specifically, diffusive Ag-in-oxide memristors show a temporal response during and after stimulation similar to that of a biological synapse. The novel diffusive memristor and its synapse-like dynamics enable a direct emulation of both short- and long-term plasticity of biological synapses and represent a major advancement in a hardware implementation for neuromorphic computing.

The cache plays a key role in determining the performance of applications, no matter for sequential or concurrent programs on homogeneous and heterogeneous architecture. Therefore, it is important to locate and differentiate cache misses accurately. This invention provides a first unified profiling tool–CachePerf–that can correctly and efficiently identify different types of cache misses while imposing reasonable overhead, differentiate issues of allocators from those of applications, and exclude minor issues without much performance impact.

Today’s computers have multiple processing cores to improve performance; however, a bottleneck arises in multi-core processors where there is only one memory controller, as each processor would need to be able to access the same memory. The Non-Uniform Memory Access computing architecture, or NUMA, addresses this bottleneck by giving a separate memory controller to each processing core. Those computing nodes are connected, and memory allocator software dictates how the system allocates resources to computing tasks. Current memory allocators have substantial drawbacks for tasks that require a large amount of remote accesses, have load imbalance among memory controllers, or have interconnect congestion.

 

The inventors have created a patent pending NUMA memory allocator called NUMAlloc that solves the above memory management problems through four innovations: 1) Binding-based memory management; 2) Interleaved heap; 3) Huge page support; 4) Reduced overhead of migrating objects among freelists. These innovations result in a drop-in, scalable memory allocator that compared to the state-of-the-art allocator speeds computing performance by an average of 13% and speeds up to about 5x for memory intensive applications.

Character rigging is the process where animators fit a skeleton to a 3D model, which then allows the animators to manipulate the movement of, or animate, the model. Currently, animators must manually define the skeleton’s joints, how they’re connected, and how the model’s body parts move. This is a very time intensive process that can take hours or days just for a single character. With the rapid rise in need for animation-ready characters and avatars in the areas of games, films, mixed reality and social media, character rigging is presently a major bottleneck to scaling the creation of animated characters.

 

In this work, the authors have written software called RigNet, which is an end-to-end automated method for producing animation rigs from input character models. By automating character rigging through RigNet, the character rigging process time is reduced from hours to minutes. RigNet is based on a deep learning architecture, trained on a large and diverse collection of rigged models, including their mesh, skeletons and corresponding skin weights. RigNet is able to predict both a unique skeleton and a skinning that match animator expectations, which is in contrast to prior art methods that just fit pre-defined, template skeletons to the 3D models that aren’t high enough quality. Finally, because all that is needed to use RigNet is a 3D model, animators do not need to be trained experts to rig characters, as is the case today.

Resistance switching devices, also known as memristive devices, represent the next generation in computing. With a typical metal-oxide-metal structure, memristors change resistance under different external biases and retain this new resistance even when power is turned off. This allows memristors to store data without needing constant power like in traditional computer memory. Memristors have other desirable properties such as low power consumption, fast switching speed, and multistate logic potential. These properties open up next generation computing applications in non-volatile memory, reconfigurable switches, bio-inspired neuromorphic computing, and radiofrequency switches. However, before these applications are enabled, significant technical challenges in memristors must be overcome. These include cycle-to-cycle instabilities in operating voltage and resistance states, which cause memory retention and device endurance issues.

 

Professor Stephen Nonnenmann and his laboratory address these instability issues by embedding highly ordered metal nanoislands in the memristor’s oxide switching layer. Through a unique template-directed nanoisland embedding procedure, the nanoisland diameter, spacing, and area density can be precisely controlled. The Nonnenmann lab found that through precise control of these variables, the growth of conductive filaments formed through the memristor’s oxide layer, which enable its unique properties, can be more precisely controlled, leading to a nearly 100% improvement in uniformity performance in one device case.

[%SearchResultsTechnologyDescription%]

True random number generators (TRNGs) are used in cryptography and cyber security, and are increasingly important in an interconnected world at risk from cyber threats. Hardware random number generators use physical variables, such as thermal noise or the photoelectric effect, as sources of randomness in number generation. However, they suffer from drawbacks such as scalability, circuit complexity, and reliance on post-processing.

 

Here, Dr. Qiangfei Xia and Dr. Joshua Yang have invented a memristor-based TRNG. It is the first memristor-based TRNG to pass NISTSs 15 randomness tests without the need for post processing. In operation, the device switches to a low resistance state under a voltage pulse after a random delay time, and relaxes back to a high resistance state spontaneously once the electrical bias is removed. These are the sources of randomness for the TRNG. Memristor-based TRNGs offer a compact, fast, and energy-efficient design.

Though many paradigms have been developed to study multitasking using eye tracking, most traditional applications of eye tracking are not used in real time, but instead to augment training or simply to observe optimal strategies. As eye tracking methods become more popular, they have been applied in the field of human-computer interaction and usability, as well as human-robot interaction. Recent real-time eye tracking assistance systems have focused on specific domains such as training, evaluation, or basic hypothesis testing in areas such as medical imaging, security, and aviation.

 

EyeFrame successfully addresses the need for domain-general multitasking assistance. EyeFrame allows the user to program sensory cues on a screen display which direct the user’s attention to neglected areas of the screen. These neglected areas are determined from real-time attention data gathered by an input device, such as a mouse or an eye tracker. EyeFrame is an assistive system for managing multiple visual tasks, which is domain-general, transparent, intuitive, non-interfering, non-command, improves control (without replacing direct control), and adaptively extrapolates to a variety of circumstances.